Design and Implementation of Multilevel Inverter Topology with Reduced Switching Components

Authors

  • Jayakumar Velayutham Department of Electrical and Electronics Engineering, M. Kumarasamy College of Engineering, India
  • Karthikeyan Ramasamy Department of Electrical and Electronics Engineering, M. Kumarasamy College of Engineering, India

DOI:

https://doi.org/10.7546/CRABS.2024.01.11

Keywords:

multilevel inverter, pulse width modulation, level number per switch ratio, component per level factor, total harmonic distortion

Abstract

Multilevel inverters play a vital role in renewable energy applications. In this paper we designed a new MLI topology for various renewable energy sources application with fewer switches using the multiple pulse width modulation technique. H-Bridge MLI topology is designed and implemented in an asymmetrical configuration. The equal amplitude of DC sources is symmetric, and unequal amplitude DC sources are used asymmetrically. On operating the MLI in an asymmetric design with four voltage sources, eight switches and 15-level output is produced, while in symmetric mode 9-level output is produced. The low-frequency modulation scheme is applied with a designed switching pattern where the switching period is pre-determined. The proposed topology is designed with reduced switches, minimal total harmonic distortion (THD) and the results are compared with conventional multilevel inverter topologies. The proposed MLI topology performance is validated and verified with number of switches and voltage levels and mainly LSR & CLF. Fifteen-level MLI operation is also simulated using MATLAB platform for experimental validation. The results produced by proposed topology are found to be encouraging and superior than any other conventional topology.

Author Biographies

Jayakumar Velayutham, Department of Electrical and Electronics Engineering, M. Kumarasamy College of Engineering, India

Mailing Address:
Department of Electrical and Electronics Engineering,
M. Kumarasamy College of Engineering
Karur, 639113, India

E-mail: jk2020jv@gmail.com

Karthikeyan Ramasamy, Department of Electrical and Electronics Engineering, M. Kumarasamy College of Engineering, India

Mailing Address:
Department of Electrical and Electronics Engineering,
M. Kumarasamy College of Engineering
Karur, 639113, India

E-mail: papkarthik@gmail.com

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Published

29-01-2024

How to Cite

[1]
J. Velayutham and K. Ramasamy, “Design and Implementation of Multilevel Inverter Topology with Reduced Switching Components”, C. R. Acad. Bulg. Sci. , vol. 77, no. 1, pp. 91–100, Jan. 2024.

Issue

Section

Engineering Sciences